コマンド・データ処理
RAD-HARD Quad 500 Mbps Bus LVDS Receiver
Arquimea
ARQUIMEA’s ARQ-LVR002 device is a Quad Bus Low
Voltage Differential Signals (LVDS) Receiver intended
for low power, high-speed and low noise operation.
Data path consists in a fully differential LVDS input
with its associated LVCMOS/LVTTL output.
The ARQ-LVR002 allows high-speed LVDS data
transmission for point-to-point or multi-drop
interconnects. The device is specifically designed for
the bridging of multiple backplanes in a system.
- 仕様
- ▪ 500.0 Mbps low jitter data path
▪ 3.3 V power supply
▪ CMOS/TTL compatible inputs/Outputs
▪ Low power Consumption
▪ Cold sparing on all pins
▪ 2ns Propagation delay in temperature range
▪ Extended LVDS input common mode [-4V; +5] V
▪ Receiver input threshold ≤ ±100 mV
▪ 25 mV (typ) Input hysteresis
▪ Fail Safe protection circuit
etc.
